DS8838N
Quad Unified Bus Transceiver
The DS8838 is a quad high speed driver/receiver designed
for use in bus organized data transmission systems interconnected
by terminated 120W impedance lines. The external
termination is intended to be 180W resistor from the bus to
the +5V logic supply together with a 390W resistor from the
bus to ground. The bus can be terminated at one or both
ends. Low bus pin current allows up to 27 driver/receiver
pairs to utilize a common bus. The bus loading is unchanged
when VCC = 0V. The receivers incorporate hysteresis to
greatly enhance bus noise immunity. One two-input NOR
gate is included to disable all drivers in a package simultaneously.
Receiver performance is optimized for systems with
bus rise and fall times ? 1.0 μs/V.
Features
n 4 totally separate driver/receiver pairs per package
n 1V typical receiver input hysteresis
n Receiver hysteresis independent of receiver output load
n Guaranteed minimum bus noise immunity of 1.3V, 2V
typ.
n Temperature-insensitive receiver thresholds track bus
logic levels
n 20 μA typical bus terminal current with normal VCC or
with VCC = 0V
n Open collector driver output allows wire-OR connection
n High speed
n Series 74 TTL compatible driver and disable inputs and
receiver outputs
Integrated circuit
ic ic's
MIL-SPEC
NOTE:
ALL ELECTRONICS ARE UNTESTED
SOLD AS IS